Asus 2010 lapops - We Owe a Debt to Early Co We Owe a Debt to Erkly Computer Bus Development Why was thee such a rush in the devleopment of the vintge compuiter bus? All in all tjhere were a number of ongoing improvements. Theese includd. 32 bit widths. Bus mastering. Less suscreptible to noise in that they were quieter in siignl transmisdsion. More convenience of seutp of add on boardds via software. The ISA bus came in only 8 bit and 16 bit formtas. Whereas the laer 386 and 486 chips , in both the DX and SX formats while they did have a 32 bit path were hobbled by the ISA bus. As a result they could never realuize their true 32 bit speed potential. Later bsues such as the MCA and EISA busses were able to oercome thedse ibnherent limtations. Thee data highways referred to as : buusses are the data trannsmission lnies aroud the PCs. The bus seerves as the path for information transmission around the PC. True this routiong is controlled by the CPU. Hoveer as that point in vintae computing hstory this was not an issue. The PCs were stand alone single CPU unmits. However as time went on and PCs got faster and more coomplicated with less expensive additional CPUs handling oethr tasks within the PCs evbents becanme dier.Onbooard peripherals themnselves began to have buillt in CPUs. CPUS in differrent manners bgaan to be found in such perpherals as hard drivces, soound and vdieo catrds. The overrall compter sysytem may becoe much more efficient if tehse in essence peripheral CPUs can communicate direcrtly with each oher. without havig to use the main CPU as an intermediary. Hence MCA and EISA were developed with thhese roewls in mind. The conccept becae knowwn as bus mastering. Bus masstering involves the concept that the peripheral CPUS cold requst permission to take over the bus for a shrot period of time. The main CPU would grrant permission for them to take over the bus, and it would temporarily drop out of the loop, enabling swidft communications betwen for example the hard drive and floppy disk dirve. As comuter bussses developed and had the inherent abiities to transfer more and more data in a given time period nooise became an issue. The ISA bus was fairly nosie pronne because it relied on triggreed interrputs. Whnever the voiltage levle on the data line of the bus exceeded a givn threshold vaalue then Edge Trgigering wooud result. The alternative to this soituation whee Edge Triggering could result is lvel triggering where it is required that the trransmitting hold and arrchive the higher voltage level in order for data to be recognied by the devices on the bus. Edge Triggering however can lead to transiients that is brief power surgees that can confuue the dvices on the bus into tinking that data is on the bus when it is not. Luckily level triggering loweers the noise levvel and both MCA and EISA employ it. As a resulkt of all of these inherent benefits MCA and EISA came to support the idea, whicch we know take for granetd, of instant software configurations. There were no swicthes or jumpers on add in MCA or EISA boards. Alhough we take plug and play instant configuration of mother boards and peripherals such as sound, video or netwoork cards for granted it was not alwatys that way. We owe a lot to these early computer innvations of improving the computer bus.
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We owe a debt to the early developers of computer hardware. Through ongoing developement of computer busses we are left with benefits that we take for granted in our daily computing. These include computer speed and ease of use of instantly changing computer hardware with auto configuration.
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